# PLL with phase-frequency detector

The idea is to model a classic PLL with a Phase-Frequency Detector (PFD) as a hybrid system. This post documents the first attempt…

The diagram of the PLL is:

The loop filter and the VCO can be almost perfectly modeled as linear subsystems (ignoring non-linearities due to circuit design, saturations, etc.).

The Loop Filter proposed for this analysis has a current input and a voltage output:

The VCO has infinite input impedance. The filter’s equations are (after some manipulations):

where $v_{1}$ and $v_{2}$ are the capacitor voltages, relative to VCC/2. The filter’s output is $v_{0}=v_{1}$.

The VCO’s equation is:

where $k_{V}$ is the control input to frequency output gain, and $f_{0}$ is the free-running frequency (which is the output when the control voltage is VCC/2).

The reference input, $\phi_{REF}$, is modeled as an oscillator with fixed frequency $f_{REF}$:

The PFD as the phase detector is inherently hybrid. Its internal circuit is:

Block $\tau_{D}$ is a delay element (used to eliminate a dead-band in the phase comparator to reduce output jitter).

The following hypotheses are made to simplify the analysis:

• the two current sources are considered to be perfectly matched.
• the delays of the two flip-flops (especially the delays in the reset circuits) are considered to be perfectly matched.
• the switches have zero ON resistance.
• the real delays in the OR gate and in the FFs’ reset circuits are included in $\tau_{D}$.

As an example of operation, the PFD’s output is shown for a particular case:

If we work with the phases modulo-$2\pi$, we can draw its state machine as follows:

so, in a compact form,

To model the delay, we use a timer $\tau$, such that $\dot{\tau}=1$ when $u=d=1$.

Summarizing, the state vector will be:

The flow map f(x) will be:

The jump map g(x) will be:

where

Looking at the PFD’s state machine we can obtain the jump set, and, as a consequence, also the flow set:

As an example, we can use this model to simulate a circuit based on the 74HC9046 PLL. In this example, we use the following parameters:

We can design a stabilizing loop filter ($C_{1}$$C_{2}$$R$) based on the linearized model of the PFD. Looking at the PFD’s signals, and assuming frequency tracking, we can see that the linearized model of the PFD takes the form:

The loop gain will be:

where $Z\left(s\right)$ is the filter’s impedance to ground (seen from its input). If we take:

we can see that the linearized model will be stable:

The step response of the linearized system is:

To simulate this system, we can set an initial condition such as:

This means that the initial state is:

• capacitors charged to VCC/2
• PFD’s mode is $u=d=0$.
• the timer is reset to 0.
• the initial reference phase is $\pi$.
• the initial VCO phase is 0.

This implies that the VCO’s frequency will be de-synchronized from the reference. We expect to see a traditional non-linear PLL acquisition behavior.

The following code simulates the system, using HyEQ Lite.

run.m:

%condiciones iniciales:
%x = v1, v2, u, d, tau, fi_ref, fi_vco
x0 = [0; 0;  0; 0; 0;   pi;     0];

%horizonte de simulación
TSPAN = [0 10];
JSPAN = [0 2500];

% rule for jumps
% rule = 1 -> priority for jumps
% rule = 2 -> priority for flows
% rule = 3 -> random priority
rule = 1;

options = odeset('RelTol',1e-6,'MaxStep',.1);

%simular
[t j x] = HyEQsolver(@f, @g, @C, @D, x0, TSPAN, JSPAN, rule, options);

%graficar la frecuencia
Kv = 1E6;
f0 = 0.9E6;
figure
plot(t * 1E3,(Kv*x(:,1) + f0) / 1E6);
xlabel 't (ms)'
ylabel 'f (MHz)'


Flow map f.m:

function xdot = f(x)

%parámetros: C1, C2, R, ip, Kv, fref
ip = 1E-3;      %1mA
C1 = 390E-9;    %390nF
C2 = 3.9e-6;    %3.9uF
R = 50;         %50ohms
Kv = 1E6;
fref = 1E6;     %1MHz
f0 = 0.9E6;

%x = v1, v2, u, d, tau, fi_ref, fi_vco
v1 = x(1);
v2 = x(2);
u = x(3);
d = x(4);
tau = x(5);
fi_ref = x(6);
fi_vco = x(7);

xdot =  [1/C1*(u-d)*ip - (v1-v2)/(R*C1);   (v1 - v2)/(R*C2);   0; 0; u*d; 2*pi*fref; 2*pi*(Kv*v1+f0)];

end


Jump map g.m:

function xplus = g(x)

%parámetros: Tdelay
Tdelay = 10E-9;  %10ns

%x = v1, v2, u, d, tau, fi_ref, fi_vco
v1 = x(1);
v2 = x(2);
u = x(3);
d = x(4);
tau = x(5);
fi_ref = x(6);
fi_vco = x(7);

%calculo u, d, tau
if (tau >= Tdelay) %asumo u=d=1
u = 0;
d = 0;
tau = 0;
elseif (u == 0) && (d == 0)
if (fi_ref >= 2*pi)
u = 1;
d = 0;
else %asumo fi_vco >= 2*pi
u = 0;
d = 1;
end
else
u = 1;
d = 1;
end

%calculo fi_*
if ((fi_ref >= 2*pi) || (fi_vco >= 2*pi))
fi_ref = fi_ref - 2*pi;
fi_vco = fi_vco - 2*pi;
end

xplus = [v1; v2; u; d; tau; fi_ref; fi_vco];

end


Flow set C.m:

function b = C(x)
b = 1 - D(x);
end


Jump set D.m:

function b = D(x)
%parámetros: Tdelay
Tdelay = 10E-9;  %10ns

%x = v1, v2, u, d, tau, fi_ref, fi_vco
v1 = x(1);
v2 = x(2);
u = x(3);
d = x(4);
tau = x(5);
fi_ref = x(6);
fi_vco = x(7);

if (u == 0) && (d == 0) && ((fi_ref >= 2*pi) || (fi_vco >= 2*pi))
b = 1;
elseif (u == 0) && (d == 1) && (fi_ref >= 0)
b = 1;
elseif (u == 1) && (d == 0) && (fi_vco >= 0)
b = 1;
elseif (u == 1) && (d == 1) && (tau >= Tdelay)
b = 1;
else
b = 0;
end

end


We can plot some results (for example, the VCO’s output frequency):

We can see that roughly until 0.5ms the PLL exhibits a non-linear behavior, and after that, the linearized model seems to be valid.

A zoom of the last part of the curve shows the switching:

A zoom of the acquisition phase shows the non-linear behavior: